This invention relates to test and measurement instruments, and more particularly to equivalent time sampling and, for example, to an optical time domain reflectometer (OTDR) that employs an improved equivalent time sampling system.
An OTDR is an optical fiber test instrument that launches light pulses into a fiber, then measures the back reflected light signals as a function of time. By examining the result, useful information such as location and loss of connectors and fiber length can be determined.
With reference to FIG. 1, a block diagram of an OTDR in accordance with the prior art, Some of the typical functional blocks in an OTDR include:
Laser diode light source 12, pulsed current source for laser 14, photodiode light receiver 16, fiber directional coupler amplifiers 20, analog to digital converter (ADC) 22, acquisition timing comprising a pulse trigger 24 and ADC clock 26, memory for trace acquisition 28, controller (Digital Signal Processor (DSP) 30, and user interface/display 32.
An OTDR must be able to generate time records over a wide range of record lengths and time steps, to accommodate various fiber lengths from very short, to very long, e.g., 100 kilometers, with trace time steps over 0.3125 ns to 40 ns. Time measurement records are built up over many pulse repetitions rather than a single pulse, for two reasons:                small time steps, less than 1.0 ns, are needed for short cables. Practical ADCs cannot sample that quickly in real time. For example, a typical ADC might have sampling period of 40 ns; and        received signal levels are so small that many samples must be taken and averaged for each trace point, to increase the signal to noise ratio.        
During each pulse rep, a subset of the required trace datapoints is acquired. All the different subsets that taken together comprise the trace record are acquired and stored in memory over a sequence of pulse repetitions numbering at least the following:(ADC clock period)/(trace time step).
This process of acquiring and storing over a sequence of pulse repetitions is repeated if averaging is employed. For example, with (ADC clock period)=40 ns and (trace time step)=0.3125 ns, the required number of pulse repetitions is at least 40/0.3125=128. If 64 averages are needed, pulse repetitions=128*64=8,192.
When the resulting trace memory is properly ordered, the result is an equivalent time trace that is identical to what would be obtained in real time at the trace time step rate, or 3.2 GHz for the present example.
OTDR implementations in accordance with the prior art achieve fine time base resolution by using a sequential sampling interlacing scheme, where the ADC clock rate determines coarse sample intervals, and an analog adjustable time delay circuit preceding the pulse generator provides the fine intervals. Each pulse repetition employs a different delay setting to cover all the required trace points. However, in such an implementation, the delay circuit requires high speed, precision parts and also must be calibrated to account for component variations, and is subject to temperature induced inaccuracy. Such a prior art system typically includes a constant current source/capacitor ramp generator that connects to a high speed comparator. The other comparator input comes from a digital to analog converter (DAC). By varying the DAC setting with the digital signal processor 30, a variable delay between starting the ramp and triggering the comparator is obtained, to provide a delay of the actual trigger of the OTDR lasers.
Some drawbacks of the prior art scheme include:                the need to calibrate prior to an acquisition sequence to calibrate the variable delay generator, by determining the DAC values that correspond to the position of two successive A/D clock edges, using the “CAL status” as feedback indicating the relative position of the Delayed Trigger to the A/D clock edge;        the need to calculate DAC values to create the desired interlacing of samples in the equivalent time sampling system;        “finicky” high speed, precision analog hardware is required; and        inaccuracies from second order effects.        
Calculating DAC values to create the interlacing of samples is prone to some problems in that the delay is created using analog systems and thus subject to inaccuracies. Further, calibration requires moving the rising edge of the Delayed Trigger into the setup/hold region of a clocked digital part, which is prone to metastability which may lead to inaccurate calibration of the variable delay generator. Also, the laser pulse generator depends on the use of RC time constants to control the laser pulse widths. Individual component variations and inaccuracies result in variations between one device and the next when manufacturing devices.
It would be desirable to have an OTDR system that provided better step size precision, that did not need calibration adjustments and that was free from temperature drift.